The present invention generally relates to a dial signal generator, and particularly to a dial signal generator of generating dial signals of the pulse type and dual tone multi-frequency type.
Recently, a variety of functions of a telephone set have been proposed. Currently, a telephone set capable of selectively sending two different types of dial signals is available. Generally, the two different types of dial signals are of the dial pulse (DP) type and the dual tone multi-frequency type (hereafter simply referred to as DTMF type). Such telephone sets are provided with a dial signal generator which generates a dial pulse signal and a DTMF signal.
A conventional dial signal generator is described with reference to FIGS. 1A, 1B and 1C. Referring to FIG. 1A, there is illustrated a conventional dial signal generator. A dial signal generator 100 is connected to a central processing unit (hereafter simply referred to as a CPU) 10. The CPU 10 selects a DTMF mode and a dial pulse mode. In the DTMF mode, the CPU 10 generates a row number and a column number corresponding to a dial number to be sent. In the dial pulse mode, the CPU 10 generates dial data (number of pulses) corresponding to a dial number to be sent. The row and column numbers supplied from the CPU 10 are temporarily stored in row-number and column-number registers 11 and 12, respectively. Similarly, the dial data from the CPU 10 is stored in a dial data register 13. FIG. 2 illustrates the correspondence among the dial number, dial data, row number and column number.
In the DTMF mode, the row and column numbers stored in the corresponding registers 11 and 12 are supplied to a dial tone multi-frequency generator (hereafter simply referred to as a DTMF generator) 14. An example of the structure for the DTMF generator 14 is illustrated in FIG. 1B. As shown, the DTMF generator 14 is made up of programmable frequency dividers 21a, 21b, a clock generator 22, sine wave decoders 23a, 23b, digital-to-analog converters (D/A converters) 24a, 24b and an adder 25. The row number is read out of the row-number register 11 and supplied to the programmable frequency-divider 21a. Similarly, the column number is read out of the column-number register 11 and supplied to the programmable frequency-divider 21b. The programmable frequency-dividers 21a and 21b count a pulse signal derived from the clock generator 22 in accordance with the respective values of the frequency dividing ratio programed therein. The counted values in the programmable frequency-dividers 21a and 21b are converted into sine wave data by the sine wave decoders 23a and 23b, respectively. Then the sine wave data from the sine wave decoders 23a and 23b are converted into analog signals by the D/A converts 24a and 24b, respectively. The converted analog signals derived from the D/A converters 24a and 24b are added to each other by the adder 25, and a resultant signal is output through an output terminal 15.
The D/A converter 24a outputs step waves necessary to generate sine waves of frequencies of approximately 697Hz, 770Hz, 852Hz and 941Hz corresponding to row numbers `1`, `2`, `3` and `4`, respectively. Similarly, the D/A converter 24b outputs step waves necessary to generate sine waves of frequencies of approximately 1209Hz, 1336Hz, 1477Hz and 1633Hz corresponding to column numbers `1`, `2`, `3` and `4`, respectively. The adder 25 adds the step signals supplied from the D/A converters 24a and 24b to generate a corresponding DTMF signal. Although not illustrated, a lowpass filter is connected to the output terminal 15, and eliminates unnecessary high-frequency components contained in the DTMF signal derived from the adder 25. A CMOS single chip microcontroller TMP47C456AF manufactured by TOSHIBA includes the aforementioned row- and column-number registers 11 and 12 and the DTMF generator 14.
On the other hand, an example of the structure for the dial pulse generator 16 is illustrated in FIG. 1C. The dial data is read out of the dial data register 13 and supplied to a preset counter 27, which starts counting down the dial data supplied from the CPU 10. When the counted value is equal to or larger than ``, the preset counter 27 makes a counter 28 in the enabled state. The counter 28 is a 100-nary counter, and counts a clock until the counted value becomes a predetermined number after triggered. When the counted value in the counter 28 becomes equal to the predetermined value, the counter 28 alternately outputs set and reset pulses to a flip-flop 29. Then the flip-flop 29 outputs the dial pulse having a certain value of the duty ratio, which is output through an output terminal 17.
However, the aforementioned conventional dial signal generator presents the following disadvantages. It is required to process two signal systems consisting of the row and column numbers and the dial data with respect to the dial number. Therefore, the CPU 10 must handle a large amount of control program necessary to output the row and column numbers and the dial data. The above requires a memory having a large amount of storage capacity, and prevents the miniaturization of the entire system including the dial signal generator.